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"Security Capsules: An Architecture for Post-Silicon Security Assertion ..."

Subashree Raja et al. (2021)

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DOI: 10.1109/ISVLSI51109.2021.00053

access: closed

type: Conference or Workshop Paper

metadata version: 2022-04-09

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Subashree Raja, Padmaja Bhamidipati, Xiaobang Liu, Ranga Vemuri:
Security Capsules: An Architecture for Post-Silicon Security Assertion Validation for Systems-on-Chip. ISVLSI 2021: 248-253

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