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"A 10b 50MS/s 820µW SAR ADC with on-chip digital calibration."

Masato Yoshioka et al. (2010)

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DOI: 10.1109/ISSCC.2010.5433965

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-17

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  dblp key:
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Masato Yoshioka, Kiyoshi Ishikawa, Takeshi Takayama, Sanroku Tsukamoto:
A 10b 50MS/s 820µW SAR ADC with on-chip digital calibration. ISSCC 2010: 384-385

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