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"A 12b 1.25GS/s DAC in 90nm CMOS with >70dB SFDR up to 500MHz."

Wei-Hsin Tseng, Chi-Wei Fan, Jieh-Tsorng Wu (2011)

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DOI: 10.1109/ISSCC.2011.5746278

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-17

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  dblp key:
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Wei-Hsin Tseng, Chi-Wei Fan, Jieh-Tsorng Wu:
A 12b 1.25GS/s DAC in 90nm CMOS with >70dB SFDR up to 500MHz. ISSCC 2011: 192-194

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