Stop the war!

Остановите войну!

for scientists:

default search action

combined dblp search
author search
venue search
publication search

ask others

"A Split-Load Interpolation-Amplifier-Array 300MS/s 8b Subranging ADC in ..."

Yasuhide Shimizu et al. (2008)

> Home

Details and statistics

DOI: 10.1109/ISSCC.2008.4523302

access: closed

type: Conference or Workshop Paper

metadata version: 2020-08-13

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/isscc/ShimizuMKY08
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/isscc/ShimizuMKY08
Yasuhide Shimizu, Shigemitsu Murayama, Kohhei Kudoh, Hiroaki Yatsuda:
A Split-Load Interpolation-Amplifier-Array 300MS/s 8b Subranging ADC in 90nm CMOS. ISSCC 2008: 552-553

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.