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"Resonant clock design for a power-efficient high-volume x86-64 microprocessor."

Visvesh S. Sathe et al. (2012)

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DOI: 10.1109/ISSCC.2012.6176933

access: closed

type: Conference or Workshop Paper

metadata version: 2019-11-28

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  - conf/isscc/SatheAOPIN12
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Visvesh S. Sathe, Srikanth Arekapudi, Charles Ouyang, Marios C. Papaefthymiou, Alexander T. Ishii, Samuel Naffziger:
Resonant clock design for a power-efficient high-volume x86-64 microprocessor. ISSCC 2012: 68-70

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