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"A 176-Stacked 512Gb 3b/Cell 3D-NAND Flash with 10.8Gb/mm2 ..."

Jae-Woo Park et al. (2021)

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DOI: 10.1109/ISSCC42613.2021.9365809

access: closed

type: Conference or Workshop Paper

metadata version: 2022-10-02

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  dblp key:
  - conf/isscc/ParkKOPKLLJCKPY21
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  persistent URL:
  - https://dblp.org/rec/conf/isscc/ParkKOPKLLJCKPY21
Jae-Woo Park, Doogon Kim, Sunghwa Ok, Jaebeom Park, Taeheui Kwon, Hyunsoo Lee, Sungmook Lim, Sun-Young Jung, Hyeong-Jin Choi, Taikyu Kang, Gwan Park, Chul-Woo Yang, Jeong-Gil Choi, Gwihan Ko, Jae-Hyeon Shin, Ingon Yang, Junghoon Nam, Hyeokchan Sohn, Seok-in Hong, Yohan Jeong, Sung-Wook Choi, Changwoon Choi, Hyun-Soo Shin, Junyoun Lim, Dongkyu Youn, Sanghyuk Nam, Juyeab Lee, Myungkyu Ahn, Hoseok Lee, Seungpil Lee, Jongmin Park, Kichang Gwon, Woopyo Jeong, Jungdal Choi, Jinkook Kim, Kyowon Jin:
A 176-Stacked 512Gb 3b/Cell 3D-NAND Flash with 10.8Gb/mm² Density with a Peripheral Circuit Under Cell Array Architecture. ISSCC 2021: 422-423

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