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BibTeX record conf/isscc/KangJKKCKRKLKLY16
@inproceedings{DBLP:conf/isscc/KangJKKCKRKLKLY16, author = {Dongku Kang and Woopyo Jeong and Chulbum Kim and Doo{-}Hyun Kim and Yong{-}Sung Cho and Kyung{-}Tae Kang and Jinho Ryu and Kyung{-}Min Kang and Sungyeon Lee and Wandong Kim and Hanjun Lee and Jaedoeg Yu and Nayoung Choi and Dong{-}Su Jang and Jeong{-}Don Ihm and Doo{-}Gon Kim and Young{-}Sun Min and Moosung Kim and Ansoo Park and Jae{-}Ick Son and In{-}Mo Kim and Pansuk Kwak and Bong{-}Kil Jung and Doosub Lee and Hyunggon Kim and Hyang{-}Ja Yang and Dae{-}Seok Byeon and Ki{-}Tae Park and Kyehyun Kyung and Jeong{-}Hyuk Choi}, title = {7.1 256Gb 3b/cell {V-NAND} flash memory with 48 stacked {WL} layers}, booktitle = {2016 {IEEE} International Solid-State Circuits Conference, {ISSCC} 2016, San Francisco, CA, USA, January 31 - February 4, 2016}, pages = {130--131}, year = {2016}, crossref = {DBLP:conf/isscc/2016}, url = {https://doi.org/10.1109/ISSCC.2016.7417941}, doi = {10.1109/ISSCC.2016.7417941}, timestamp = {Wed, 16 Oct 2019 14:14:55 +0200}, biburl = {https://dblp.org/rec/conf/isscc/KangJKKCKRKLKLY16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
@proceedings{DBLP:conf/isscc/2016, title = {2016 {IEEE} International Solid-State Circuits Conference, {ISSCC} 2016, San Francisco, CA, USA, January 31 - February 4, 2016}, publisher = {{IEEE}}, year = {2016}, url = {https://ieeexplore.ieee.org/xpl/conhome/7405163/proceeding}, isbn = {978-1-4673-9466-6}, timestamp = {Tue, 16 Aug 2022 03:18:05 +0200}, biburl = {https://dblp.org/rec/conf/isscc/2016.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }

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