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"16.1 A 340mV-to-0.9V 20.2Tb/s source-synchronous hybrid ..."

Gregory K. Chen et al. (2014)

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DOI: 10.1109/ISSCC.2014.6757432

access: closed

type: Conference or Workshop Paper

metadata version: 2022-02-25

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Gregory K. Chen, Mark A. Anders, Himanshu Kaul, Sudhir Satpathy, Sanu K. Mathew, Steven K. Hsu, Amit Agarwal, Ram K. Krishnamurthy, Shekhar Borkar, Vivek De:
16.1 A 340mV-to-0.9V 20.2Tb/s source-synchronous hybrid packet/circuit-switched 16×16 network-on-chip in 22nm tri-gate CMOS. ISSCC 2014: 276-277

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