"A 0.5V 4Mb logic-process compatible embedded resistive RAM (ReRAM) in 65nm ..."

Meng-Fan Chang et al. (2012)

> Home

Details and statistics

DOI: 10.1109/ISSCC.2012.6177079

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-17

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/isscc/ChangWKSLYKLC12
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/isscc/ChangWKSLYKLC12
Meng-Fan Chang, Che-Wei Wu, Chia-Chen Kuo, Shin-Jang Shen, Ku-Feng Lin, Shu-Meng Yang, Ya-Chin King, Chorng-Jung Lin, Yu-Der Chih:
A 0.5V 4Mb logic-process compatible embedded resistive RAM (ReRAM) in 65nm CMOS using low-voltage current-mode sensing scheme with 45ns random read time. ISSCC 2012: 434-436

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.