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"Process variation tolerant 9T SRAM bitcell design."

G. K. Reddy et al. (2012)

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DOI: 10.1109/ISQED.2012.6187539

access: closed

type: Conference or Workshop Paper

metadata version: 2020-03-27

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G. K. Reddy, Kapil Jainwal, Jawar Singh, Saraju P. Mohanty:
Process variation tolerant 9T SRAM bitcell design. ISQED 2012: 493-497

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