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"Robust Transistor Sizing for Improved Performances in Digital Circuits ..."

Prateek Gupta et al. (2019)

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DOI: 10.1109/ISQED.2019.8697718

access: closed

type: Conference or Workshop Paper

metadata version: 2019-12-27

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  dblp key:
  - conf/isqed/GuptaMGA19
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Prateek Gupta, Harshini Mandadapu, Shirisha Gourishetty, Zia Abbas:
Robust Transistor Sizing for Improved Performances in Digital Circuits using Optimization Algorithms. ISQED 2019: 85-91

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