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"A 6-bit 1.6-GS/s domino-SAR ADC in 55nm CMOS."
Yung-Hui Chung, Wei-Shu Rih (2017)
- Yung-Hui Chung, Wei-Shu Rih:
A 6-bit 1.6-GS/s domino-SAR ADC in 55nm CMOS. ISOCC 2017: 216-217
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