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"Multiple-Valued Logic Memory System Design Using Nanoscale Electrochemical ..."

Theodore W. Manikas, Dale Teeters (2008)

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DOI: 10.1109/ISMVL.2008.23

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-23

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Theodore W. Manikas, Dale Teeters:
Multiple-Valued Logic Memory System Design Using Nanoscale Electrochemical Cells. ISMVL 2008: 197-201

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