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"Reconfigurable Concurrent VLSI (FPGA) Design Architecture of CRC-32 for ..."

Jubin Mitra, Tapan Kumar Nayak (2015)

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DOI: 10.1109/INIS.2015.66

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Jubin Mitra, Tapan Kumar Nayak:
Reconfigurable Concurrent VLSI (FPGA) Design Architecture of CRC-32 for High-Speed Data Communication. iNIS 2015: 112-117

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