Stop the war!

Остановите войну!

for scientists:

default search action

combined dblp search
author search
venue search
publication search

ask others

"A parallel VLSI architecture of singular value decomposition processor for ..."

Kuan-Ju Huang et al. (2013)

> Home

Details and statistics

DOI: 10.1109/ISCE.2013.6570189

access: closed

type: Conference or Workshop Paper

metadata version: 2019-12-05

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/isce/HuangCFF13
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/isce/HuangCFF13
Kuan-Ju Huang, Jui-Chung Chang, Chih-Wei Feng, Wai-Chi Fang:
A parallel VLSI architecture of singular value decomposition processor for real-time multi-channel EEG system. ISCE 2013: 21-22

a service of

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.