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"Design and Analysis of a Family of pW-Level Sub-1V CMOS VRGs by Stacking a ..."

Tong Zhang et al. (2024)

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DOI: 10.1109/ISCAS58744.2024.10557912

access: closed

type: Conference or Workshop Paper

metadata version: 2024-07-16

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Tong Zhang, Dingguo Zhang, Jing Jin, Patrick P. Mercier, Hui Wang:
Design and Analysis of a Family of pW-Level Sub-1V CMOS VRGs by Stacking a Current-Source Transistor and a Resistive-Load Transistor. ISCAS 2024: 1-5

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