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"A VLSI architecture for a high-speed computation of the 1D discrete ..."

Chengjun Zhang, Chunyan Wang, M. Omair Ahmad (2005)

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DOI: 10.1109/ISCAS.2005.1464874

access: closed

type: Conference or Workshop Paper

metadata version: 2018-10-24

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Chengjun Zhang, Chunyan Wang, M. Omair Ahmad:
A VLSI architecture for a high-speed computation of the 1D discrete wavelet transform. ISCAS (2) 2005: 1461-1464

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