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"An efficient VLSI architecture for rate disdortion optimization in AVS ..."

Hai Bing Yin et al. (2008)

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DOI: 10.1109/ISCAS.2008.4542040

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

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  dblp key:
  - conf/iscas/YinLXG08
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  - https://dblp.org/rec/conf/iscas/YinLXG08
Hai Bing Yin, Xi Zhong Lou, Zhe Lei Xia, Wen Gao:
An efficient VLSI architecture for rate disdortion optimization in AVS video encoder. ISCAS 2008: 2805-2808

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