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"A 12-Bit 2-GS/s Pipelined ADC Front-End Stage with Aperture Error Tuning ..."

Peilin Yang, Fule Li, Zhihua Wang (2021)

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DOI: 10.1109/ISCAS51556.2021.9401801

access: closed

type: Conference or Workshop Paper

metadata version: 2021-10-27

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  dblp key:
  - conf/iscas/YangLW21
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Peilin Yang, Fule Li, Zhihua Wang:
A 12-Bit 2-GS/s Pipelined ADC Front-End Stage with Aperture Error Tuning and Split MDAC. ISCAS 2021: 1-5

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