"VLSI architecture design of motion estimator and in-loop filter for MPEG-4 ..."

Yueh-Yi Wang, Yan-Tsung Peng, Chun-Jen Tsai (2004)

> Home

Details and statistics

DOI: —

access: unavailable

type: Conference or Workshop Paper

metadata version: 2016-05-20

- no documents available
- export record
  dblp key:
  - conf/iscas/WangPT04
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/iscas/WangPT04
Yueh-Yi Wang, Yan-Tsung Peng, Chun-Jen Tsai:
VLSI architecture design of motion estimator and in-loop filter for MPEG-4 AVC/H.264 encoders. ISCAS (2) 2004: 149-152

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.