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ORCID"A novel two-port 6T CMOS SRAM cell structure for low-voltage VLSI SRAM ..."
Bo-Ting Wang, James B. Kuo (2000)
- Bo-Ting Wang, James B. Kuo:
A novel two-port 6T CMOS SRAM cell structure for low-voltage VLSI SRAM with single-bit-line simultaneous read-and-write access (SBLSRWA) capability. ISCAS 2000: 733-736
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