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"VLSI architecture for 4×4 16-QAM V-BLAST decoder."

Fariborz Sobhanmanesh, Saeid Nooshabadi (2006)

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DOI: 10.1109/ISCAS.2006.1692580

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

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  - conf/iscas/SobhanmaneshN06
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Fariborz Sobhanmanesh, Saeid Nooshabadi:
VLSI architecture for 4×4 16-QAM V-BLAST decoder. ISCAS 2006

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