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"A 0.18-µm CMOS clock and data recovery circuit with reference-less ..."

Miao Li, Tad A. Kwasniewski, Shoujun Wang (2008)

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DOI: 10.1109/ISCAS.2008.4541928

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

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Miao Li, Tad A. Kwasniewski, Shoujun Wang:
A 0.18-µm CMOS clock and data recovery circuit with reference-less dual loops. ISCAS 2008: 2358-2361

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