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"A process-variation compensation scheme to operate CMOS digital logic ..."

Robert Kappel et al. (2013)

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DOI: 10.1109/ISCAS.2013.6571904

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

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Robert Kappel, Mario Auer, Wolfgang Pribyl, Günter Hofer, Gerald Holweg:
A process-variation compensation scheme to operate CMOS digital logic cells in deep sub-threshold region at 80mV. ISCAS 2013: 562-565

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