"A 30 MHz DDS clock generator with sub-ns time domain interpolator and -50 ..."

Antti Heiskanen, Antti Mäntyniemi, Timo Rahkonen (2001)

Details and statistics

DOI: 10.1109/ISCAS.2001.922315

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-02

a service of  Schloss Dagstuhl - Leibniz Center for Informatics