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"Area-efficient parallel decoder architecture for high rate QC-LDPC codes."

Zhiqiang Cui, Zhongfeng Wang (2006)

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DOI: 10.1109/ISCAS.2006.1693781

access: closed

type: Conference or Workshop Paper

metadata version: 2023-04-24

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Zhiqiang Cui, Zhongfeng Wang:
Area-efficient parallel decoder architecture for high rate QC-LDPC codes. ISCAS 2006

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