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"Fast word-level power models for synthesis of FPGA-based arithmetic."

Jonathan A. Clarke et al. (2006)

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DOI: 10.1109/ISCAS.2006.1692831

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

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  dblp key:
  - conf/iscas/ClarkeGCC06
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  - https://dblp.org/rec/conf/iscas/ClarkeGCC06
Jonathan A. Clarke, Altaf Abdul Gaffar, George A. Constantinides, Peter Y. K. Cheung:
Fast word-level power models for synthesis of FPGA-based arithmetic. ISCAS 2006

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