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"A 128-GS/s Timing-Robust Sampling Architecture Exploiting Analog FFT."

Xingchen Chao, Qiang Li (2023)

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DOI: 10.1109/ISCAS46773.2023.10181515

access: closed

type: Conference or Workshop Paper

metadata version: 2023-08-31

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  dblp key:
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Xingchen Chao, Qiang Li:
A 128-GS/s Timing-Robust Sampling Architecture Exploiting Analog FFT. ISCAS 2023: 1-4

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