"Victim Replication: Maximizing Capacity while Hiding Wire Delay in Tiled ..."

Michael Zhang, Krste Asanovic (2005)

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DOI: 10.1109/ISCA.2005.53

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Michael Zhang, Krste Asanovic:
Victim Replication: Maximizing Capacity while Hiding Wire Delay in Tiled Chip Multiprocessors. ISCA 2005: 336-345

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