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"Digital Twin for Energy Optimization in an SMT-PCB Assembly Line."

Neha V. Karanjkar et al. (2018)

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DOI: 10.1109/IOTAIS.2018.8600830

access: closed

type: Conference or Workshop Paper

metadata version: 2022-08-04

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  - conf/iotais/KaranjkarJMPRS18
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  - https://dblp.org/rec/conf/iotais/KaranjkarJMPRS18
Neha V. Karanjkar, Ashish Joglekar, Sampad B. Mohanty, Venkatesh Prabhu, D. Raghunath, Rajesh Sundaresan:
Digital Twin for Energy Optimization in an SMT-PCB Assembly Line. IOTAIS 2018: 85-89

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