"Resistive memory device requirements for a neural algorithm accelerator."

Sapan Agarwal et al. (2016)

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DOI: 10.1109/IJCNN.2016.7727298

access: closed

type: Conference or Workshop Paper

metadata version: 2017-06-15

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  - https://dblp.org/rec/conf/ijcnn/AgarwalPHHRCJM16
Sapan Agarwal, Steven J. Plimpton, David R. Hughart, Alexander H. Hsia, Isaac Richter, Jonathan A. Cox, Conrad D. James, Matthew J. Marinella:
Resistive memory device requirements for a neural algorithm accelerator. IJCNN 2016: 929-938

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