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"Verified Technology Mapping in an Agda DSL for Circuit Design: Circuit ..."

João Paulo Pizani Flor, Wouter Swierstra (2022)

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DOI: 10.1145/3587216.3587217

access: closed

type: Conference or Workshop Paper

metadata version: 2024-07-06

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João Paulo Pizani Flor, Wouter Swierstra:
Verified Technology Mapping in an Agda DSL for Circuit Design: Circuit refinement through gate and data concretisation. IFL 2022: 1:1-1:13

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