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"Analyzing the Single Event Upset Sensitivity of Digital Clock Manager in ..."

Tingting Yu et al. (2017)

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DOI: 10.1145/3070617.3070643

access: closed

type: Conference or Workshop Paper

metadata version: 2023-09-03

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Tingting Yu, Lei Chen, Xuewu Li, Shuo Wang, Jing Zhou:
Analyzing the Single Event Upset Sensitivity of Digital Clock Manager in Virtex-5 FPGA. IEEA 2017: 112-116

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