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"Hardware-In-the-Loop Simulation of a High Frequency Interleaved Converter ..."

Téo Robert et al. (2022)

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DOI: 10.1109/IECON49645.2022.9968950

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-21

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  dblp key:
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Téo Robert, Romain Monthéard, Valentin Combet, Mathieu Gavelle:
Hardware-In-the-Loop Simulation of a High Frequency Interleaved Converter based on a Low-Cost FPGA Platform. IECON 2022: 1-6

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