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"VLSI Implementation of RISC-V MCU with a variable stage pipeline."
Mao-Hsu Yen et al. (2023)
- Mao-Hsu Yen, Cheng-Hao Tsou, Tzu-Feng Lin, Yih-Hsia Lin, Yuan-Fu Ku, Chien-Ting Kao:
VLSI Implementation of RISC-V MCU with a variable stage pipeline. ICKII 2023: 161-165
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