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"A back biasing voltage generator for 28nm UTBB-FDSOI RVT CMOS digital ..."

Marcos Mauricio Pelicia, Ricardo Pureza Coimbra, Pedro Barbosa Zanetta (2018)

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DOI: 10.1109/ICICDT.2018.8399721

access: closed

type: Conference or Workshop Paper

metadata version: 2018-07-06

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  dblp key:
  - conf/icicdt/PeliciaCZ18
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  - https://dblp.org/rec/conf/icicdt/PeliciaCZ18
Marcos Mauricio Pelicia, Ricardo Pureza Coimbra, Pedro Barbosa Zanetta:
A back biasing voltage generator for 28nm UTBB-FDSOI RVT CMOS digital circuits. ICICDT 2018: 1-4

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