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"Modular architecture for a family of multilevel 256/192/128/64 Mbit ..."

Andrea Silvagni et al. (2001)

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DOI: 10.1109/ICECS.2001.957627

access: closed

type: Conference or Workshop Paper

metadata version: 2021-01-18

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Andrea Silvagni, Stefano Zanardi, Alessandro Manstretta, Marco Scotti, Luca Crippa, Giancarlo Ragone, Giuseppe Fusillo, Giovanni Campardo, Osama Khouri, Marcello Stefanelli:
Modular architecture for a family of multilevel 256/192/128/64 Mbit 2-bit/cell 3 V-only NOR flash memory devices. ICECS 2001: 937-940

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