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"Exploring RSA Performance up to 4096-bit for Fast Security Processing on a ..."
Grégory C. Marchesan et al. (2018)
- Grégory C. Marchesan, Nelson R. Weirich, Eduardo C. Culau, Iacana Ianiski Weber, Fernando Gehm Moraes, Everton Carara, Leonardo Londero de Oliveira:
Exploring RSA Performance up to 4096-bit for Fast Security Processing on a Flexible Instruction Set Architecture Processor. ICECS 2018: 757-760
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