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"A 40-kS/s 16-bit non-binary SAR ADC in 0.18 CMOS with noise-tunable ..."

Takaaki Ito et al. (2017)

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DOI: 10.1109/ICECS.2017.8292000

access: closed

type: Conference or Workshop Paper

metadata version: 2018-02-20

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  dblp key:
  - conf/icecsys/ItoINA17
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  - https://dblp.org/rec/conf/icecsys/ItoINA17
Takaaki Ito, Tetsuya Iizuka, Toru Nakura, Kunihiro Asada:
A 40-kS/s 16-bit non-binary SAR ADC in 0.18 CMOS with noise-tunable comparator. ICECS 2017: 1-4

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