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"A Transmission Line Modelling VLSI processor designed with a novel ..."

Vassilios A. Chouliaras, James A. Flint, Yibin Li (2007)

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DOI: 10.1109/ICECS.2007.4510995

access: closed

type: Conference or Workshop Paper

metadata version: 2021-12-08

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  dblp key:
  - conf/icecsys/ChouliarasFL07
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  - https://dblp.org/rec/conf/icecsys/ChouliarasFL07
Vassilios A. Chouliaras, James A. Flint, Yibin Li:
A Transmission Line Modelling VLSI processor designed with a novel Electronic System Level Methodology. ICECS 2007: 322-325

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