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"High resolution digital-to-time converter for low jitter digital PLLs."

Anil Chawda et al. (2014)

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DOI: 10.1109/ICECS.2014.7049912

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-30

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  dblp key:
  - conf/icecsys/ChawdaPLG14
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  - https://dblp.org/rec/conf/icecsys/ChawdaPLG14
Anil Chawda, Pallavi Paliwal, Priyank Laad, Shalabh Gupta:
High resolution digital-to-time converter for low jitter digital PLLs. ICECS 2014: 25-28

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