"A 2.0 GHz 4 Mb pseudo-SRAM with on-chip BIST for refresh in 0.18u CMOS ..."

Mehdi Bathaee et al. (2002)

Details and statistics

DOI: 10.1109/ICECS.2002.1046306

access: closed

type: Conference or Workshop Paper

metadata version: 2021-01-15

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