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"A highly linear CMOS APS circuit for column-parallel readout with improved ..."

P. Anand, G. N. Arvind, Balan Bhuvan (2020)

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DOI: 10.1109/ICECS49266.2020.9294820

access: closed

type: Conference or Workshop Paper

metadata version: 2021-12-16

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  dblp key:
  - conf/icecsys/AnandAB20
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P. Anand, G. N. Arvind, Balan Bhuvan:
A highly linear CMOS APS circuit for column-parallel readout with improved gain and process tolerance. ICECS 2020: 1-4

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