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"Design and Verification of High Performance Memory Interface Based on AXI Bus."

Ming Chen, Zhifeng Zhang, Haoqi Ren (2021)

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DOI: 10.1109/ICCT52962.2021.9658046

access: closed

type: Conference or Workshop Paper

metadata version: 2022-01-11

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  dblp key:
  - conf/icct/ChenZR21
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  - https://dblp.org/rec/conf/icct/ChenZR21
Ming Chen, Zhifeng Zhang, Haoqi Ren:
Design and Verification of High Performance Memory Interface Based on AXI Bus. ICCT 2021: 695-699

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