Stop the war!Остановите войну!
for scientists:
default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCID"A Compact Model for Analysis and Design of On-chip Power Network with ..."
Payman Zarkesh-Ha et al. (2003)
- Payman Zarkesh-Ha, Ken Doniger, William Loh, Dechang Sun, Rick Stephani, Gordon Priebe:
A Compact Model for Analysis and Design of On-chip Power Network with Decoupling Capacitors. ICCD 2003: 84-89
a service of 
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2023-03-23 23:59 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
