"A 8.8-ns 54 54-Bit Multiplier Using New Redundant Binary Architecture."

Hiroshi Makino, Yasunobu Nakase, Hirofumi Shinohara (1993)

Details and statistics

DOI: 10.1109/ICCD.1993.393380

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-23

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