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"A yield model for the evaluation of topologically constrained chip ..."

Bruno Ciciani, Giuseppe Iazeolla (1989)

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DOI: 10.1109/ICCD.1989.63405

access: closed

type: Conference or Workshop Paper

metadata version: 2021-07-28

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Bruno Ciciani, Giuseppe Iazeolla:
A yield model for the evaluation of topologically constrained chip architectures. ICCD 1989: 443-446

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