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ORCID"Three Levels Interconnect Signaling in On-Chip High Speed SerDes ..."
Nivedita Jaiswal, Radheshyam Gamad (2015)
- Nivedita Jaiswal
, Radheshyam Gamad:
Three Levels Interconnect Signaling in On-Chip High Speed SerDes Transceiver for Multi-Module SoC Communication. ICCCT 2015: 286-291
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