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"VLSI timing simulation with selective dynamic regionization."

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

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Meng-Lin Yu, Bryan D. Ackland (1994)

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DOI: 10.1109/ICCAD.1994.629765

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Meng-Lin Yu, Bryan D. Ackland:
VLSI timing simulation with selective dynamic regionization. ICCAD 1994: 195-199

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last updated on 2023-03-24 00:01 CET by the dblp team

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