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"Flip-flop insertion with shifted-phase clocks for FPGA power reduction."
Hyeonmin Lim et al. (2005)
- Hyeonmin Lim, Kyungsoo Lee, Youngjin Cho, Naehyuck Chang:
Flip-flop insertion with shifted-phase clocks for FPGA power reduction. ICCAD 2005: 335-342
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